It has been known for some time that at least some heterojunction bipolar transistors (HBTs) have the potential for very high speed, and much effort has been expended on the development of HBTs. See, for instance, U.S. Pat. No. 4,794,440, which discloses HBTs that comprise means for changing the carrier transport properties in at least one of the three regions (emitter, base, collector) of the transistors. See also U.S. Pat. No. 4,829,343 and U.S. patent applications Ser. No. 241,279 and 250,790, all dealing with hot electron HBTs.
In order for HBTs to find wide use, and especially to be incorporated into large scale integrated circuits, it is important to be able to scale down lateral device dimensions so as to minimize total current (power) associated with device operation. The emitter stripe width conventionally is used to indicate the lateral device size.
The material system that has so far probably received the most attention for HBT use is the AlGaAs/GaAs system. Despite substantial efforts however it has not yet been possible to develop a reliable manufacturing process for producing AlGaAs/GaAs HBTs that have both small emitter strip width and high current gain. Due to the inability to manufacture HBTs with small lateral dimensions (e.g., emitter stripe width of 1 .mu.m or less), the scale of integration of AlGaAs/GaAs HBTs lags substantially behind that attained in silicon bipolar technology.
One of the main reasons for the above referred-to difficulty in manufacturing AlGaAs/GaAs HBTs that have both high current gain and small lateral dimensions is the high value of the surface recombination velocity of GaAs. In the GaAs extrinsic base region of HBTs with small emitter stripe width, the surface recombination current typically dominates the total base current, decreasing the current gain of the transistor. Similar effects are likely to occur in HBTs using other compound semiconductor systems.
Different approaches for overcoming the above referred-to problem have been reported. However, these have not proven to be fully satisfactory. For instance, C. J. Sandroff et al., Applied Physics Letters, Vol. 51(1), pp. 33-35, report passivation of the extrinsic base region by spin coating thin films of Na.sub.2 S.multidot.9H.sub.2 O onto the devices after their fabrication. However, such sulfide films are hygroscopic, and the attainable gain enhancement typically is only temporary. A different approach was taken by H. H. Lin et al., Applied Physics Letters, Vol. 47(8), pp. 839-841. These workers report thinning a portion of a relatively thick emitter layer by etching, with the thinned portion forming a passivation layer on the GaAs base. The etching is a critical step that required monitoring by means of an interferometer, making the process at best difficult to carry out in a manufacturing environment. Thus, GaAs-based HBTs with an etched base passivation layer are not likely to be manufacturable with acceptable yield.
GaAs-based HBTs comprising base passivation layers have also been disclosed by S. Tiwari, IEEE Transactions on Electron Devices, Vol. ED-34(2), pp. 185-197, and W. S. Lee et al., IEEE Electron Device Letters, Vol. 10(5), pp. 200-202. The latter reference discloses for instance a GaAs-based HBT that comprises a depleted AlGaAs emitter layer that serves to passivate a portion of the GaAs base, with the base contact placed onto the portion of the base surface not covered by the AlGaAs emitter layer. Such a structure too is relatively difficult to manufacture, requiring closely controlled etching and deposition steps, and still leaves a significant portion of the GaAs base surface unpassivated.
In view of the great economic significance of HBTs, and of achieving scalability in GaAs-based and other HBTs, a device that can have high current gain with very small emitter stripe width, and which can be readily manufactured, would be of great interest. This application discloses such a device, and a process for making it.